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數(shù)字雙相型鎖相放大器

數(shù)字雙相型鎖相放大器

SR810和SR830鎖相放大器使用數(shù)字信號處理(DSP)來代替?zhèn)鹘y(tǒng)的解調(diào)器,輸出濾波器和放大器,具有非常高的性價比。 SR810僅顯示信號幅度,SR830可以同時顯示信號的幅度和相位。

 SR810 & SR830 100KHZ數(shù)字雙相型鎖相放大器

           

SR 810

              

SR830

 

主要特性:

  • 差動式或單端式輸入模式
  • 電流或電壓信號輸入模式
  • 1 mHz至102.4 kHz頻率響應范圍
  • 動態(tài)儲備(Dynamic reserve):> 100 dB
  • 穩(wěn)定性:5 ppm /°C
  • 相位分辨率:0.01度
  • 時間常數(shù)范圍:10μs到30 ks
  • 自動調(diào)整增益、相位、動態(tài)儲備、補償設置
  • 增益設置范圍:2nV~1V
  • 計算機接口:GPIB和RS-232接口

 

Signal Channel(輸入信號通道)
Voltage inputs Single-ended or differential
Sensitivity 2 nV to 1 V
Current input 106 or 108 V/A
Input impedance
   Voltage input 10 MΩ + 25 pF, AC or DC coupled
   Current input 1 kΩ to virtual ground
Gain accuracy ±1 % (±0.2 % typ.)
Noise 6 nV/√Hz at 1 kHz
0.13 pA/√Hz at 1 kHz (106 V/A)
0.013 pA/√Hz at 100 Hz (108 V/A)
Line filters 50/60 Hz and 100/120 Hz (Q=4)
CMRR 100 dB at 10 kHz, decreasing by 6 dB/oct above 10 kHz
Dynamic reserve >100 dB (without prefilters)
Stability <5 ppm/°C
Reference Channel(參考信號)
Frequency range 0.001 Hz to 102.4 kHz
Reference input TTL or sine (400 mVpp min.)
Input impedance 1 MΩ, 25 pF
Phase resolution 0.01° front panel, 0.008° through computer interfaces
Absolute phase error <1°
Relative phase error <0.001°
Orthogonality 90° ± 0.001°
Phase noise(相位噪聲)
   Int. reference Synthesized, <0.0001° rms at 1 kHz
   Ext. reference 0.005° rms at 1 kHz, 100 ms, 12 dB/oct
Phase drift <0.01°/°C below 10 kHz, 
<0.1°/°C, 10 kHz to 100 kHz
Harmonic detection 2F, 3F, ... nF to 102 kHz (n < 19,999)
Acquisition time (2 cycles + 5 ms) or 40 ms, whichever is greater
Demodulator(解調(diào)器)
Stability Digital outputs and display: no drift. Analog outputs: <5 ppm/°C for all dynamic reserve settings.
Harmonic rejection -90 dB
Time constants 10 µs to 30 ks (6, 12, 18, 24 dB/oct rolloff). Synchronous filters available below 200 Hz.
Internal Oscillator(內(nèi)部振蕩器)
Range 1 mHz to 102 kHz
Accuracy 25 ppm + 30 µHz
Frequency resolution 4½ digits or 0.1 mHz, whichever is greater
Distortion -80 dBc (f <10 kHz), -70 dBc (f >10 kHz) @ 1 Vrms amplitude
Amplitude 0.004 to 5 Vrms into 10 kΩ (2 mV resolution), 50 Ω output impedance, 50 mA maximum current into 50 Ω
Amplitude accuracy 1 %
Amplitude stability 50 ppm/°C
Outputs Sine, TTL (When using an external reference, both outputs are phase locked to the external reference.)
Displays(顯示參數(shù))
Channel 4½-digit LED display with 40-segment LED bar graph. X, R, X-noise, Aux 1 or Aux 2. The display can also be any of these quantities divided by Aux 1 or Aux 2.
Channel 2 (SR830) 4½-digit LED display with 40-segment LED bar graph. Y, Θ, Y-noise, Aux 3 or Aux 4. The display can also be any of these quantities divided by Aux 3 or Aux 4.
Offset X, Y, R can be offset up to ±105 % of full scale.
Expand X, Y, R can be expanded by 10× or 100×.
Reference 4½-digit LED display
Inputs and Outputs(輸入輸出)
CH1 output ±10 V output of X, R, X-noise, Aux 1 or Aux 2. Updated at 512 Hz.
CH2 output (SR830) ±10 V output of Y, Θ, Y-noise, Aux 3 or Aux 4. Updated at 512 Hz.
X, Y outputs In-phase and quadrature components
   (rear panel) (±10 V), updated at 256 kHz
Aux. A/D inputs 4 BNC inputs, ±10 V, 1 mV resolution, sampled at 512 Hz
Aux. D/A outputs 4 BNC outputs, ±10 V, 1 mV resolution
Sine Out Internal oscillator analog output
TTL Out Internal oscillator TTL output
Data buffer The SR810 has an 8k point buffer. The SR830 has two 16k point buffers. Data is recorded at rates to 512 Hz and read through the computer interfaces.
Trigger In (TTL) Trigger synchronizes data recording
Remote pre-amp Provides power to the optional SR550, SR552 and SR554 preamplifiers
General(一般參數(shù))
Interfaces(計算機接口) IEEE-488.2 and RS-232 interfaces standard. All instrument functions can be controlled and read through IEEE-488.2 or RS-232 interfaces.
Power 40 W, 100/120/220/240 VAC, 50/60 Hz
Dimensions 17" × 5.25" × 19.5" (WHL)
Weight 23 lbs.
Warranty One year parts and labor on defects in materials and workmanship

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